imx8qm HDMI-TX调试

HDMI

参考资料

• chipset: DS90UB929-Q1
• iMX8M HDMI
• HDMI之HPD
• Linux/DS90UB929-Q1: DS90UB929 HDMI HPD signal is always low

HDMI PIN

无引脚复用

驱动信息

• HDP = HDMI + DisplayPort
• /home/zengjf/imx8src/imx8qm_android/p9.0.0.0/vendor/nxp-opensource/kernel_imx/drivers/gpu/drm/imx/hdp/imx-hdp.c

i2c error

zengjf@AdanUbuntuServer:gpu$ pwd /home/zengjf/imx8src/imx8qm_android/p9.0.0.0/vendor/nxp-opensource/kernel_imx/drivers/gpu zengjf@AdanUbuntuServer:gpu$ grep dp_aux_init * -R drm/imx/hdp/imx-hdp.c: dp_aux_init(&hdp->state, dev); 

• static int imx_hdp_imx_bind(struct device *dev, struct device *master, void *data)
  • dp_aux_init(&hdp->state, dev);
    • struct imx_hdp *hdp = state_to_imx_hdp(state);
    • ret = drm_dp_aux_register(&hdp->aux);
      • ret = drm_dp_aux_register_devnode(aux);
      • ret = i2c_add_adapter(&aux->ddc);

目前发现beta版本的存在问题，是给eDP用的，不是给HDMI输出用的，并且在GA版本HDMI其实也没有注册DDC功能，使用了自定义的EDID；

调试参数及流程

• i2creg settings

  # Device settings i2cBus=0x2 deviceAddress=0x14 

• 调试DS90UB929-Q1的时候，主要是看FPD3_STS(0x5A)寄存器状态；
• 调试发现，是FPD 3信号上的一个电感断路导致FPD握手失败，从而导致HPD一直维持在低电平，进而导致HDMI信号无输出；

DTS

• /home/wugn/imx8_p9.0.0_2.0.0_ga/android9.0.0/device/fsl/imx8q/mek_8q/BoardConfig.mk

  BOARD_PREBUILT_DTBOIMAGE := out/target/product/mek_8q/dtbo-imx8qm.img ifeq ($(PRODUCT_IMX_CAR),true) AB_OTA_PARTITIONS += bootloader BOARD_OTA_BOOTLOADERIMAGE := out/target/product/mek_8q/bootloader-imx8qm.img ifeq ($(PRODUCT_IMX_CAR_M4),true) # imx8qm auto android TARGET_BOARD_DTS_CONFIG := imx8qm:fsl-imx8qm-mek-car.dtb # imx8qm auto android virtualization TARGET_BOARD_DTS_CONFIG += imx8qm-xen:fsl-imx8qm-mek-domu-car.dtb # imx8qxp auto android TARGET_BOARD_DTS_CONFIG += imx8qxp:fsl-imx8qxp-mek-car.dtb # u-boot target for imx8qm_mek auto android TARGET_BOOTLOADER_CONFIG := imx8qm:imx8qm_mek_androidauto_trusty_defconfig # u-boot target for imx8qxp_mek auto android TARGET_BOOTLOADER_CONFIG += imx8qxp:imx8qxp_mek_androidauto_trusty_defconfig else # imx8qm auto android without m4 image TARGET_BOARD_DTS_CONFIG := imx8qm:fsl-imx8qm-mek-car2.dtb # imx8qxp auto android without m4 image TARGET_BOARD_DTS_CONFIG += imx8qxp:fsl-imx8qxp-mek-car2.dtb # u-boot target for imx8qm_mek auto android TARGET_BOOTLOADER_CONFIG := imx8qm:imx8qm_mek_androidauto2_trusty_defconfig # u-boot target for imx8qxp_mek auto android TARGET_BOOTLOADER_CONFIG += imx8qxp:imx8qxp_mek_androidauto2_trusty_defconfig endif #PRODUCT_IMX_CAR_M4 # u-boot target for imx8qm_mek auto android virtualization TARGET_BOOTLOADER_CONFIG += imx8qm-xen:imx8qm_mek_androidauto_xen_dual_defconfig # u-boot target for imx8qm_mek linux which has virtualization enabled TARGET_BOOTLOADER_CONFIG += imx8qm-xen-dom0:imx8qm_mek_spl_defconfig else # imx8qm standard android; MIPI-HDMI display TARGET_BOARD_DTS_CONFIG := imx8qm:fsl-imx8qm-mek-ov5640.dtb # <------------------ # imx8qm standard android; MIPI panel display TARGET_BOARD_DTS_CONFIG += imx8qm-mipi-panel:fsl-imx8qm-mek-dsi-rm67191.dtb # imx8qm standard android; HDMI display TARGET_BOARD_DTS_CONFIG += imx8qm-hdmi:fsl-imx8qm-mek-hdmi.dtb # imx8qxp standard android; MIPI-HDMI display TARGET_BOARD_DTS_CONFIG += imx8qxp:fsl-imx8qxp-mek-ov5640.dtb # u-boot target for imx8qm_mek standard android TARGET_BOOTLOADER_CONFIG := imx8qm:imx8qm_mek_android_defconfig # u-boot target for imx8qxp_mek standard android TARGET_BOOTLOADER_CONFIG += imx8qxp:imx8qxp_mek_android_defconfig endif #PRODUCT_IMX_CAR 

• 参考/home/wugn/imx8_p9.0.0_2.0.0_ga/android9.0.0/vendor/nxp-opensource/kernel_imx/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-hdmi.dts中的HDMI的配置；
• /home/wugn/imx8_p9.0.0_2.0.0_ga/android9.0.0/vendor/nxp-opensource/kernel_imx/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-ov5640.dts

  &irqsteer_hdmi { status = "okay"; }; &hdmi { compatible = "fsl,imx8qm-hdmi"; assigned-clocks = <&clk IMX8QM_HDMI_PXL_SEL>, <&clk IMX8QM_HDMI_PXL_LINK_SEL>, <&clk IMX8QM_HDMI_PXL_MUX_SEL>; assigned-clock-parents = <&clk IMX8QM_HDMI_AV_PLL_CLK>, <&clk IMX8QM_HDMI_AV_PLL_CLK>, <&clk IMX8QM_HDMI_AV_PLL_CLK>; fsl,no_edid; status = "okay"; }; 

内核HDMI参数

• device/fsl/imx8q/mek_8q/BoardConfig.mk

  BOARD_KERNEL_CMDLINE := init=/init androidboot.hardware=freescale video=HDMI-A-1:800x480@60 fbcon=rotate:1 androidboot.fbTileSupport=enable cma=800M@0x960M-0xe00M androidboot.primary_display=imx-drm firmware_class.path=/vendor/firmware transparent_hugepage=never # Default wificountrycode BOARD_KERNEL_CMDLINE += androidboot.wificountrycode=CN ifeq ($(PRODUCT_IMX_CAR),true) BOARD_KERNEL_CMDLINE += galcore.contiguousSize= video=HDMI-A-2:d else BOARD_KERNEL_CMDLINE += androidboot.console=ttyLP0 endif 

• video格式：video=:x[M][R][-][@][i][m][eDd]
  • : Connector, e.g. DVI-I-1, see /sys/class/drm/ for available connectors
  • x : resolution
  • M: compute a CVT mode?
  • R: reduced blanking?
  • -: color depth
  • @: refresh rate
  • i: interlaced (non-CVT mode)
  • m: margins?
  • e: output forced to on
  • d: output forced to off
  • D: digital output forced to on (e.g. DVI-I connector)
• 一定要注意x参数，屏幕的解析度是从这里解析出来的，不是从驱动中获取的；

EDID

• /home/wugn/imx8_p9.0.0_2.0.0_ga/android9.0.0/vendor/nxp-opensource/kernel_imx/drivers/gpu/drm/imx/hdp/imx-hdp.c

  static struct drm_display_mode edid_cea_modes[] = { /* 3 - 720x480@60Hz */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, { DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER, 26200, 800, 832, 848, 892, 0, 480, 484, 486, 488, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE, }, /* 4 - 1280x720@60Hz */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 16 - 1920x1080@60Hz */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, , 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 97 - 3840x2160@60Hz */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, , 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 96 - 3840x2160@30Hz */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, , 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, }; 

DS90UB929-Q1初始化

static int ds90ub929_chip_init(struct ds90ub929 *ds90ub929) { int err = 0; int reg_data; unsigned char reg_addr; unsigned char buffer[2]; /* Configure Registers *Note: This is also the hardware reset value for these registers. */ /* err = ds90ub929_write_checkout(ds90ub929, 0x03, 0xDA); if (err) { pr_err("%s: ds90ub947_single_write failed.", __func__); return err; } err = ds90ub929_write_checkout(ds90ub929, 0x17, 0xDE); if (err) { pr_err("%s: ds90ub947_single_write failed.", __func__); return err; } */ #if 1 /* a. 0x48 = 0x01 b. 0x49 = 0x00 c. 0x4A = 0x00 d. 0x4B = 0x01 e. 0x4C = 0x00 f. 0x4D = 0x00 g. 0x4E = 0x01 */ // https://e2e.ti.com/support/interface/f/138/t/ err = ds90ub929_write_checkout(ds90ub929, 0x48, 0x01); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x49, 0x00); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x4A, 0x00); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x4B, 0x01); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x4C, 0x00); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x4D, 0x00); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x4E, 0x01); msleep(100); #endif reg_addr=0x5B; reg_data = ds90ub929_read(ds90ub929, reg_addr, 1, buffer); ds90_dbg("reg_0x%x = [0x%x]\n",reg_addr,buffer[0]); buffer[0] = buffer[0] & (~(0x01 << 5)); ds90_dbg("reg_0x%x = [0x%x]\n",reg_addr,buffer[0]); err = ds90ub929_write_checkout(ds90ub929, reg_addr, buffer[0]); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x16, 0x02); msleep(10); reg_addr=0x04; reg_data = ds90ub929_read(ds90ub929, reg_addr, 1, buffer); ds90_dbg("reg_0x%x = [0x%x]\n",reg_addr,buffer[0]); buffer[0] = buffer[0] | (0x01 << 4); ds90_dbg("reg_0x%x = [0x%x]\n",reg_addr,buffer[0]); err = ds90ub929_write_checkout(ds90ub929, reg_addr, buffer[0]); msleep(100); /* – Register 0x40 = 0x10 – Register 0x41 = 0x49 – Register 0x42 = 0x10 – Register 0x42 = 0x00 */ err = ds90ub929_write_checkout(ds90ub929, 0x40, 0x10); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x41, 0x49); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x42, 0x10); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x42, 0x00); msleep(10); /* – Register 0x40 = 0x14 – Register 0x41 = 0x49 – Register 0x42 = 0x10 – Register 0x42 = 0x00 */ err = ds90ub929_write_checkout(ds90ub929, 0x40, 0x14); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x41, 0x49); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x42, 0x10); msleep(10); err = ds90ub929_write_checkout(ds90ub929, 0x42, 0x00); msleep(10); //tp_rst_thread_init(); return 0; }