Recalculating equation (1) results in an actual Dmax of 48%.（非常重要！！！）
重新计算等式 (1) 导致实际 Dmax 为 48%。
1.Switching Frequency 开关频率
2.Transformer Design [2] 变压器设计
3.MOSFET Selection MOSFET选型
At turn on the drain current begins to flow through the FET device when the gate voltage has reached the Vgs threshold. This drain current will continue to rise until reaching its final value.Meanwhile, the drain to source voltage will remain at Vds, calculated earlier in (10).
The whole process repeats itself in reverse at turn off. The power dissipation of the FET’s output capacitance, Coss, also contributes to the switching losses in the form of ½C*V^2 f.
整个过程在关闭时反向重复。 FET 输出电容 Coss 的功耗也会以 ½CV^2 *f 的形式影响开关损耗。
4.Diode Selection 二极管选型
5.input and Output Capacitors 输入输出电容器
6.SNUBBERS AND CLAMPS [7]缓冲器和夹钳 [7]
7.LC FILTER LC滤波器
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